1/5 AN4870 application note www.dynexsemi.com 80 100 120 140 160 180 200 thyristor junction temperature - (?c) 0 20 40 60 80 100 percentage of voltage grade v drm v rrm fig.1 thyristor de-rating curves the junction temperature ( t j ) of a power semiconductor in any particular situation profoundly affects its performance and reliability. during its working life a thyristor can experience a wide range of temperatures. operating at ?0?c is not damaging but allowance must be made by the user for increased gate trigger current, latching current and holding current as well as slow turn-on (see application note an4840 gate triggering and gate characteristics). working in the range between room temperature and 125?c gives the best compromise between ease of operation and operational life. t j = 125?c is chosen as the design maximum value since above this, blocking current starts to increase rapidly, thus degrading voltage rating, see fig.1. the device becomes much more susceptible to over-voltage transients , high dv/dt, di/dt and surge current. in the case of the forward blocking junction there is an increasing chance of forward breakover triggering. for special applications it is possible to select devices to operate continuously with low leakage at t j = 140?c but such devices may need to be fully characterised and rated on other parameters at 140?c. many applications involve infrequent current overloads for short periods and it is possible to allow t j to rise well above 125?c in such situations. a typical situation is during a load short circuit when the device is protected by a fuse. in 50hz circuits the thyristor may often have to carry short circuit current for up to 10ms. during this time t j can rise transiently to 300 - 500?c without the junction being damaged. peak temperature lags peak current by typically 2 or 3 milliseconds and, although falling, is still high at the end of the current pulse. if current is interrupted by a fuse, little or no reverse voltage appears across the device. however, the re-application of reverse voltage at such a high temperature can result in very high reverse recovery power dissipation. this escalates the junction temperture further and the subsequent high blocking current leads to reverse voltage failure by thermal runaway. limit case surge currents are determined by experimental means using a 50hz half sine of current and published in the data sheet. these i tsm limit values are used to determine the peak temperature ( using i tsm for v r =0 ) and the temperature at the end of the current loop ( using i tsm for v r = 50% v rrm ). these temperatures are then taken as the limit temperatures for the particular device. if temperatures in other applications are kept below these, then the condition will be safe. the method of calculating overload t j for the published i tsm currents and other overload conditions is discussed below. the overload above assumed a high speed fuse or circuit breaker will interrupt the supply before forward blocking voltage appears. some overloads require that the device survives with AN4870 effects of temperature on thyristor performance application note replaces september 2000 version, AN4870-3.0 AN4870-3.1 july 2002
2/5 www.dynexsemi.com AN4870 application note 100% 75% 50% 25% 1 0.1 0.01 0.001 failure rate / 1000hrs 40 50 60 70 80 90 100 junction temperature - ( ? c) fig.2 thyristor failure rate vs applied voltage as a percentage of v drm (rated) and junction temperature due to ion migration in junction passivation fig.3 thermal fatigue life expectancy 1.00e + 03 1.00e + 04 1.00e + 05 1.00e + 06 1.00e + 07 1.00e + 08 no. of cycles 250 200 150 100 50 0 temperature excursion - ( ? c) 30mm 38mm 50mm 75mm 100mm both reverse and then forward voltage being reapplied. for forward blocking two possible failure modes apply:- 1) failure to turn-off because of the high turn-off time,t q value at elevated temperature. 2) breakover due to high blocking current alone. the most likely is 1). variation of t q with temperature for a range of other conditions must be determined experimentally. other important temperatures are: temperatures below t j(max) where ion migration on the silicon surface under the passivation can lead to long term degradation. (see fig.2) continuous t j permitted before thermal runaway occurs. this is likely to be important only with high leakage thyristors and when very small heatsinks are used. circa 250 ? c continuous: rubber locaters and organic passivation material starts to disintegrate; some annealing- out of electron irradiation. above 600 ? c. the metal of the surface contacts starts to penetrate into the silicon causing eventual short circuit. this is probably a factor in di/dt failure. 1100 to 1300 ? c. this is the temperature reached at non- repetitive di/dt limits. the high local thermal stress causes cracking of the silicon. 1415 ? c - melting point of silicon. another important temperature limit is the magnitude of temperature excursions ( ? t j ) which relates strongly to the operating life of the device. slow temperature changes stress the various mechanical parts of the device and cause the movement of one component relative to another due to differential expansion and contraction.
3/5 AN4870 application note www.dynexsemi.com rapid temperature changes associated with highdi/dt can cause micro cracking. it has been shown that, in silicon, micro cracking occurs with ? t between 300 and 350 ? c. somos et al have shown how the value of ? t relates the expected life time of the device measured in numbers of operations and device diameter. (fig.3). although continuous operation at 250 to 300 ? c will destroy pn junction characteristics it is possible to operate transiently in this region if allowance is made for reduced device life. such is the philosophy behind surge current protection when roughly 100 operations up to i tsm values are allowed in the life time of a device. when any overload current wave shape is more complex than a simple sine wave a method of calculating end-of-pulse temperature has to be used. calculation of steady state t j takes account of the device case temperature, average current/power loss and steady state thermal resistance. however, for short term overloads it is necessary to include variation of device thermal resistance with time and the device on-state volt drop with temperature. a method of calculating junction temperature using a computer program is described for overloads lasting 1 to about 100ms: the information on the overload current is inputted as a series of instantaneous current values with corresponding time points. the device transient thermal impedance curve is represented as a polynomial with 5 components, fig.4 5 z( t ) = a(i).exp[ -t / b ( i ) ] i=1 where b = 0.001,0.01,0.1,1.0 and 2 seconds. associated with each component is a constant and each device type has its own unique set of 5 constants. the variation of on-state voltage with forward current is also represented by a polynomial with 5 components. v( i, t j ) = v ( 1 + bt x t j ) + r + i (1 + al x t j ) + e ( 273 + t j ) log 10 (i) + 2.3025 the curve is determined experimentally using a 10ms half sine pulse which goes to currents which are almost 90% of i tsm . the resultant heating effect is noticeable by the v f increase on the falling edge of the current pulse. an example of such a surge loop is shown in fig.5. notice that the surge loop equation includes a temperature term which the normal data sheet v tm curve does not. in other words, the surge loop model calculates change in v tm due to junction temperature increase. 0.1 0.01 0.001 thermal impedance - junction to case - ( ? c/w) 0.001 0.01 0.1 1.0 10 time - (s) anode side cooled double side cooled conduction d.c. halfwave 3 phase 120 ? 6 phase 60 ? effective thermal resistance junction to case ? c/w double side 0.022 0.024 0.026 0.027 anode side 0.038 0.040 0.042 0.043 fig.4 maximim (limit) transient thermal impedance - junction to case current - (a) voltage - (v) fig.5 surge loop
4/5 www.dynexsemi.com AN4870 application note p1 p2 p3 p4 p5 t 1 t 2 t 3 t 4 t 5 time t j(1) t j(2) t j(3) t j(4) t j(5) t j(6) junction temperature = o 6 t 6 fig.6 these three input items are then used to calculate instantaneous power and temperature rise at specified time intervals, e.g. 1ms. the procedure using the superposition thereom is as follows: 1. take the initial t j at the start of the first 1ms period as t j (1). 2. use this in the surge loop equation to calculate average power in the first interval. (p1). 3. from the average period power and transient thermal resistance at 1ms calculate temperature rise in the first period and hence starting temperature for second period, t j (2) where t j (2) = t j (1) + t rise (1). 4. proceed to the second time period and use t j (2) to calculate appropriate volt drop values and power in this period. 5. use the average power in period 2 (p2) and the change in thermal resistance between 1ms and 2ms to calculate the rise in the second interval. this then gives the temperature at the end of the second interval, t j (3). 6. continue this procedure for as many intervals as necessary. the procedure is more clearly explained by considering a waveform with 5 intervals. t j(6) = p1 [ z (t 6 -t 1 ) - z ( t 6 -t 2 ) ] + p2 [ z (t 6 -t 2 ) - z ( t 6 -t 3 ) ] + p3 [ z (t 6 -t 3 ) - z ( t 6 -t 4 ) ] + p4 [ z (t 6 -t 4 ) - z ( t 6 -t 5 ) ] + p5 [ z (t 6 -t 5 ) ] we are using the calculated results as a measure of device survivability so how reliable are the results? the main assumption is that current flow is uniform across the device area so that temperature is also assumed uniform. this means that current pulses must be wide enough to allow the thyristor to reach full conduction. for small thyristors of a few mm diameter this is easily achievable for pulses of less than 1ms. with larger diameter devices e.g. 30 to 100mm, pulses of several milliseconds are required. for most converter applications this presents no restriction. another possible source of error is the potential inaccuracy of the transient thermal impedance curve, particularly at times of 1 to 10ms. it is very difficult to measure this part of the curve so calculation is used. a transmission line model is assumed but since it is difficult to assign accurate values to the various contact thermal resistances between metallic parts conservative values are used. values depend on surface finishes and clamping forces. for times longer than about 100ms heat generated at the junction starts to pass into the cooling fin. this is not accounted for in this particular model. calculation of temperature rise for short pulses requires more complex 2 and 3 dimensional analysis, possibly involving finite element analysis techniques. device turn-on behaviour and its dependency on voltage, temperature, di/dt and gate drive has to be taken into account.
www.dynexsemi.com power assembly capability the power assembly group was set up to provide a support service for those customers requiring more than the basic semiconductor, and has developed a flexible range of heatsink and clamping systems in line with advances in device voltages and current capability of our semiconductors. we offer an extensive range of air and liquid cooled assemblies covering the full range of circuit designs in general use today . the assembly group offers high quality engineering support dedicated to designing new units to satisfy the growing needs of our customers. using the latest cad methods our team of design and applications engineers aim to provide the power assembly complete solution (pacs). heatsinks the power assembly group has its own proprietary range of extruded aluminium heatsinks which have been designed to optimise the performance of dynex semiconductors. data with respect to air natural, forced air and liquid cooling (with flow rates) is available on request. for further information on device clamps, heatsinks and assemblies, please contact your nearest sales representative or customer services. customer service tel: +44 (0)1522 502753 / 502901. fax: +44 (0)1522 500020 sales offices benelux, italy & switzerland: tel: +33 (0)1 64 66 42 17. fax: +33 (0)1 64 66 42 19. france: tel: +33 (0)2 47 55 75 52. fax: +33 (0)2 47 55 75 59. germany, northern europe, spain & rest of world: tel: +44 (0)1522 502753 / 502901. fax: +44 (0)1522 500020 north america: tel: (613) 723-7035. fax: (613) 723-1518. toll free: 1.888.33.dynex (39639) / tel: (949) 733-3005. fax: (949) 733-2986. these offices are supported by representatives and distributors in many countries world-wide. ?dynex semiconductor 2002 technical documentation ?not for resale. produced in united kingdom headquarters operations dynex semiconductor ltd doddington road, lincoln. lincolnshire. ln6 3lf. united kingdom. tel: +44-(0)1522-500500 fax: +44-(0)1522-500550 this publication is issued to provide information only which (unless agreed by the company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. no warranty or guarantee express or implied is made regard ing the capability, performance or suitability of any product or service. the company reserves the right to alter without prior notice the specification, design or price of any product or service. information con cerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. it is the user's responsibility to fully deter mine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. these products are not suitable for use in any me dical products whose failure to perform may result in significant injury or death to the user. all products and materials are sold and services provided subject to the company's conditions of sale, w hich are available on request. all brand names and product names used in this publication are trademarks, registered trademarks or trade names of their respec tive owners. http://www.dynexsemi.com e-mail: power_solutions@dynexsemi.com datasheet annotations: dynex semiconductor annotate datasheets in the top right hard corner of the front page, to indicate product status. the annota tions are as follows:- target information: this is the most tentative form of information and represents a very preliminary specification. no actual design work on the product has been started. preliminary information: the product is in design and development. the datasheet represents the product as it is understood but details may change. advance information: the product design is complete and final characterisation for volume production is well in hand. no annotation: the product parameters are fixed and the product is available to datasheet specification.
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